EC551 Advanced Digital Design with Verilog and FPGAs - Final Projects

Boston University students demonstrate their final projects in Fall 2011.

Verilog intro - Road to FPGAs #102

Best & Fast Prototype ($2 for 10 PCBs): https://www.jlcpcb.com Thanks to JLCPCB for supporting this video. We know logic gates already. Now, let't take a quick ...

Synthesis - blink, counter examples | Road to FPGAs #103

Best & Fast Prototype ($2 for 10 PCBs): https://www.jlcpcb.com We know ModelSim and Quartus. In this third part we finally make the synthesis and upload the ...

FPGA Audio Synthesizer final project

This is our final project for ECE 385 Digital Systems Laboratory at University of Illinois Urbana-Champaign (SP 2017) Code can be found here: ...

VGA Controller on FPGA||verilog code

We are providing a Final year IEEE project solution & Implementation with in short time. If anyone need a Details Please Contact us Mail: ...

Overview on LTE implementation using XILINX FPGA Graduation Project ( Arabic )

This is an overview on LTE implementation using XILINX FPGA Graduation Project in arabic aimed at third year students. VHDL was used. This a link to ...

UART & FPGA Bluetooth connection | Road to FPGAs #104

Best & Fast Prototype ($2 for 10 PCBs): https://www.jlcpcb.com In this forth part of FPGA and verilog, we will create a full UART comunication in Verilog. See the ...

Smart Fan fpga project

Final project for Digital Electronic 2 "Smart Fan" based on VHDL language.

ModelSim PE Student Edition Installation and Sample Verilog Project - Beginners Tutorial

This video is a tutorial for how to install ModelSim PE Student Edition (Free Licensed) and there is a sample project of Verilog Half _Adder to give you a jump ...

Project Trellis: enabling open source tools for the Lattice ECP5 FPGA - David Shah - ORConf 2018

Project Trellis documents the bitstream and low-level architecture of Lattice ECP5 FPGAs, which combined with the SymbiFlow tools enables a full open source ...

Student Project 3 Variable-Speed FPGA Counter

This is a student project for Professor Kleitz's ELEC 222 course at SUNY TC3. It is a variable-speed multiplexer-selected counter implemented on the Altera DE0 ...

Student Project 2 FPGA Counter with Decoder

This is a student final project for Professor Kleitz's ELEC 222 Digital Electronics course at SUNY TC3. It is an Up/Down variable-speed counter.

Deep Neural Network Hardware Accelerator on FPGA

Students project for Digilent Design Contest 2018 More information here[Documentation+Source Code]: ...

Real Time Clock on FPGA -A Small Project by B-tech Students

Real Time Clock on FPGA using Altera DE2 Board.

Student Project 1 FPGA Shift Register with LPMs and VHDL

This is a final project for Professors Kleitz's ELEC 222 course. It is a variable-speed Left/Right shift register implemented on an Altera DE0 FPGA board.

FPGA Projects: Photocell/Photoresistor and ADC

Attached a Light Sensor, or Photocell (CdS photoresistor), to the analog-to-digital (ADC) module, and have the FPGA capture the data from the ADC. Values are ...

Ping pong fpga project verilog

Ping pong project fpga.

VHDL & FPGA Project : Sonar ranger & movement detection alarm on DE2 board

A video demonstration of a students project about: VHDL Project of sonar ranger & movement detection alarm on DE2 board. The range detector rotates on an ...

FPGA Based Hardware Implementation of AES Rijndael Algorithm for Encryption and Decryption

We are providing a Final year IEEE project solution & Implementation with in short time. If anyone need a Details Please Contact us Mail: ...